Design of fast core node processor for packet forwarding without header modification in optical networks


We present a design of a fast all-optical core-node processor that performs packet-forwarding in optical networks without header-modification. The design is based on bit-serial architecture using TOADs as logic-gates that perform modulo-arithmetic to forward packets.

Divisions: College of Engineering & Physical Sciences > Adaptive communications networks research group
College of Engineering & Physical Sciences > Aston Institute of Photonics Technology (AIPT)
Additional Information: This paper was published in Technical Digest and is made available as an electronic reprint with the permission of OSA. The paper can be found at the following URL on the OSA website: Systematic or multiple reproduction or distribution to multiple locations via electronic or other means is prohibited and is subject to penalties under law.
Event Title: Conference on Lasers and Electro-Optics/Quantum Electronics and Laser Science Conference
Event Type: Other
Event Dates: 2003-06-06
Uncontrolled Keywords: computer networks,intelligent networks,routing,process design,photonics,optimized production technology,optical network units,optical fiber networks,optical design,multiprotocol label switching
ISBN: 1-55752-748-2
Last Modified: 27 Dec 2023 09:56
Date Deposited: 02 Dec 2014 12:55
Full Text Link:
Related URLs: http://www.opti ... LEO-2003-CThM49 (Publisher URL)
PURE Output Type: Conference contribution
Published Date: 2003-06-01
Authors: Wong, Wai M.
Blow, Keith J. (ORCID Profile 0000-0002-7859-3438)



Version: Published Version

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